Reliability evaluation of Convolutional Neural Network's basic operations on a RISC-V processor - INRIA 2 Access content directly
Conference Papers Year : 2023

Reliability evaluation of Convolutional Neural Network's basic operations on a RISC-V processor

Abstract

Thanks to RISC-V open-source Instruction Set Architecture, researchers and developers can efficiently propose new solutions at a low-cost and low-power consumption. RISC-Vbased architectures can, then, be customized to run Machine Learning (ML) algorithms efficiently and be inserted on safety and mission-critical domains, where the execution must be reliable. However, a fault in the hardware resources can compromise the system's ability to operate correctly. Thus, it is necessary to characterize the ML applications' vulnerabilities on RISC-V processors, as it is not as thoroughly characterized as other accelerators. This work is the first to evaluate the neutroninduced error rate of Convolutional Neural Network (CNN) basic operations running on a RISC-V processor, GAP8. Our results show that executing the algorithm in parallel increases performance, and memory errors are the major contributors to the device error rate. We show that the error rate of the GAP8 unprotected memories is one order of magnitude higher than the CNN basic operations.
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Dates and versions

hal-04047058 , version 1 (27-03-2023)

Licence

Public Domain

Identifiers

  • HAL Id : hal-04047058 , version 1

Cite

Fernando Fernandes dos Santos, Angeliki Kritikakou, Olivier Sentieys. Reliability evaluation of Convolutional Neural Network's basic operations on a RISC-V processor. NSREC 2023 - IEEE Nuclear & Space Radiation Effects Conference, IEEE Nuclear and Plasma Sciences Society (NPSS), Jul 2023, Kansas City, MO, United States. pp.1-6. ⟨hal-04047058⟩
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